1. Field of the Invention
The present invention relates to a video display controller for use in terminal equipment for a computer, a game machine or the like.
2. Prior Art
There have been proposed various kinds of display control systems which comprise a video display processor and display animation and still images on a screen of a CRT (cathode-ray tube) display unit under the control of a CPU (central processing unit). FIG. 1 shows one example of such conventional systems, which example comprises a video display controller (hereinafter referred to as "VDP") 101 and a central processing unit (CPU) 102. The system further comprises a memory 103 which includes a ROM (read only memory) storing a variety of programs to be executed by the CPU 102 and a RAM (random access memory) for storing other necessary data. The CPU 102 outputs data representative of still and animation images to be displayed on a screen of a CRT display unit 104 to the VDP 101 which in turn stores the still and animation data into a video RAM (hereinafter referred to as "VRAM") 105.
Upon receipt of a display command from the CPU 102, the VDP 101 sequentially reads the still and animation data from the VRAM 105 in accordance with scanning synchronization signals of the CRT display unit 104, and supplies the read data to the CRT display unit 104 thereby to display the still and animation images on the screen of the CRT display unit 104.
Such a video display controller, as described above is generally provided with a kind of code converter called a color palette circuit. The color palette circuit converts each of color codes (codes for designating colors of display elements which constitute still and animation images on the screen) read from the VRAM into three color data RD (red), GD (green) and BD (blue) each composed of about two or three bits to thereby form a digital RGB signal. On the other hand, when it is desired to output a composite video signal, the color data RD, GD and BD are multiplied respectively by predetermined coefficients in a matrix circuit, and then the multiplication results are added together. The signal thus obtained is outputted as the composite video signal.
The case where a black and white display is performed in the conventional display controller will now be briefly described. As is well known, to obtain a gray scale or achromatic colors such as white, gray and black, the respective color data RD, GD and BD, which correspond to three primary colors, have to be made equal in value to each other. Therefore, in the case where each of the color data RD, GD and BD consists of two bits, a four-gradation display can be realized by data "00", "01", "10" and "11". And in the case where each color data consists of three bits, an eight-gradation display can be realized by data "000", "001", "010", . . . , "111". However, an image displayed using achromatic colors of about eight gradations is poor in quality (somewhat unnatural) as compared with an image displayed by an ordinary black and white television set. Therefore, to obtain a black and white display image of high quality, the image must be displayed using achromatic colors of at least sixteen gradations.
As described above, the conventional display controller is disadvantageous in that a high-quality image can not be reproduced in the black and white display mode because of the insufficiency of gradation. This disadvantage can be overcome by increasing the number of bits of each primary color data. However, the increase of the number of bits of the color data causes a problem in that the number of component elements of the relevant color palette circuit and matrix circuit also increase.